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COTS memories have increased failures

Recent analysis by Google has shown DRAM errors to be orders of magnitude higher than reported by manufacturers.   Based on analysis of server usage and failure rates, it was determined that ~8% of all DIMM are affected by errors each year.  The reason for the memory failures is that OEMs, test houses and chip makers have cut back–or taken shortcuts–on the memory test process in an effort to cut costs.

This is a serious concern for the space products market.  Many new missions want to take advantage of the increased capabilities of these new devices, yet the 10-100X increase in failure rate will be a high mission risk obviously.  Lot by lot upscreening and detailed manufacturer auditing are are the only ways to retire these risks.

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