|
|
||
![]() Name: Doug J. Sheldon Position:Parts Engineering Supervisor, Part Engineering Group (5141) Background: Doug has over 15 years of experience in semiconductor technology, project management, and reliability analysis. His experience spans the technology and product development flow from R&D to high volume manufacturing, including product reliability, strategic planning, and technology integration. Prior to joining JPL, Doug formed his own consulting company to provide applied technology analysis and business case planning. Prior to this, he worked as the Manager of Strategic Product Planning at Agilent Technologies, where he was responsible for defining new products and marketing strategies for test equipment for embedded microprocessor and digital signal processors in wireless applications. Since he joined JPL, Doug has had dramatically increasing responsibilities, including: VLSI Lead (Very Large-Scale Integrated circuits) in the Parts Engineering Group, JPL Representative on Industry Tiger Team for FPGA (Field-Programmable Gate Array) issues, assignment to support the JPL Office of Chief Engineer (B. Muirhead) on EEE parts issues, and assignment to NASA-wide warrant holder as an authority on EEE parts issues.
|