Name: Ramin Roosta

Position: Senior Parts Specialist, Parts Engineering Group (5141)

Biography: Dr. Roosta received his B.S. in Electronics Engineering from University of Tehran, M.S. Degree and Ph.D. Degree from University of Southern California in Electrical and Computer Engineering. He joined the Jet Propulsion Laboratory in 2001 as a Senior Member of the Parts Engineering Group of the Electronic Parts Engineering Office. He has published more than 50 publications including a chapter of a text and several manuscripts.

His area of expertise includes FPGA/ASIC design, testability, and top-down design methodology using VHDL. He has been the principal investigator on several research grants from local and national industry. He is also the recipient of several awards including, San Fernando Valley Engineering Council, Outstanding Engineer Merit Award, Distinguished Engineering Educator Award, IEEE distinguished Service award, and IEEE Millennium Award. He is currently serving as FPGA/ASIC Specialist in the Parts Engineering Group and is the designated NASA expert on FPGA/ASIC. Dr. Roosta is also a member of Defense Supply Center Columbus (DSCC) audit team as JPL/NASA representative. His area of research includes FPGA and ASIC design, testability, and reliability. Ramin has served as the chair of IEEE San Fernando Valley section 2000-2004 and is currently on the board of directors of San Fernando Valley Engineers’ Council.

Dr. Roosta has contributed to practically every mission that JPL as well as other NASA centers have launched in the past several years, as a technical task manager and FPGA/ASIC specialist. He has contributed to several NASA/JPL programs, including Mars Odyssey, Stardust, X-2000, MER, MRO, Cloud Sat, MTO, MSL, OSTM, Aquarius, Wise, AMT, and Dawn. His area of research includes VLSI design automation, FPGA/ASIC design, and FPGA/ASIC design for testability/reliability. He has been the principal investigator on several major research grants.