February 22nd, 2010
In collaboration with ASU, 340, and 345, Drs. Steven Guertin and Philippe Adell have been approved for a 2010 Director’s Research and Development Fund award. The work will cover development of the Highly Efficient Rad-hard-by-design Microprocessor for Enabling Spacecraft (HERMES).
February 17th, 2010
Dr. Steven Guertin participated in the test readiness review for Boeing’s Integrated Test Chip (ITC) which is a 49-core RHBD Tilera-architecture microprocessor. Results of the ITC effort will lead directly into final production of the MAESTRO processor out of the OPERA program. This work was sponsored by ATPO and JEO.
February 11th, 2010
Dr. Steven Guertin attended a seminar on Aeroflex’s UT699 LEON-3FT System on a Chip device at the LAX Marriot. This work was sponsored by ATPO and JEO.